|Job Ref:||204669169||Employer:||cv-library.co.uk||Industry:||Civil and Structural||Job Type:||Permanent||Country:||United Kingdom||County/State:||Warwickshire||City:||Gaydon||Address:||Post Code:||CV35||Salary:||£35000 - £38000/annum||Post Date:||14/10/2016 03:18|
Requirements specification for Signals, Nodes, Functions. Communication Design (signal packing, Frame Identifier assignment, gateway routing).
Measure Vehicle bus loading/bandwidth. Initialisation time of all ECU's and messages. End to End latency. Evaluate metrics tools and Simulation model development. Physical layer design specification and testing.
Requirement identification of features by reading the Feature/ECU Specifications. Early identification of Faults and design flaws of Communication design level before it goes in to implementation.
Measure and Analyse vehicle network architecture before it goes to Validation and readiness of vehicle, which will reduce the cost and Time of redesign and testing of architecture.
Measure Bus Load and Latency for Vehicle with and without new feature for all Frames using Analysis Tools. Measuring the BUS load and Latency of each frame.
Vehicle Level serial data communication design and analysis
Author Requirements specification for Signals, Nodes, and Functions.
Communication Design (signal packing, Frame Identifier assignment, gateway routing)
Implications of adding carry over ECU's.
Support interfacing to other network (lin nodes).
Use Volcano Network Architect (VNA). Or Mentor graphics VSA.
Physical layer design specification and testing.
The working hours are 39 hrs 7.30 to 4.30 Mon to Thurs and 7.30 to 12.30 on Friday.
Qualifications & Experience:
Engineering Degree or Equivalent Qualification. (Electronics, Electrical, Telecommunication, software.)
Automotive Electronics related design or test work experience
Have good understanding of CAN, LIN, and FlexRay protocol Specifications.
Has Good knowledge of DBC and FIBEX Automotive standards for serial data/communication level.
Supporting Serial Data Metrics Definition and methods to analyze them. E.g.[Initialization Trace Log , Bus Load, Jitter, Transmission Opportunities, End to End Latencies
Electrical System of vehicle topology analysis and design at communication level.
Version and Variant management of ECU and signals.
In Depth Knowledge of using Use Volcano Network Architect (VNA)/mentor Graphics VSA.
Experience of using Timing Analysis tools (can scope)
Have used vehicle diagnostic tools.
Knowledge of FMEA/FTA Hazard analysis.
Technically acute in using Vector tools (CANalyser, CANoe, etc)
Have used physical layer design testing.
A successful candidate must hit the ground running with a well established team under significant daily pressure of work. The candidate must show strong character attributes as well as the necessary knowledge and experience above. The best candidate will be open-minded and lateral thinking in the face of stiff timing and product targets. The candidate must be proactive and trust their initiative using minimum supervision to produce practical solutions.
Must have a clean and valid driving license